diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile index 792845071b05c..7a2c81987c865 100644 --- a/arch/arm/boot/dts/overlay/Makefile +++ b/arch/arm/boot/dts/overlay/Makefile @@ -1,5 +1,8 @@ # SPDX-License-Identifier: GPL-2.0 dtbo-$(CONFIG_ARCH_ROCKCHIP) += \ + rockchip-ebyte-ecb41-pge-spi0-1cs-spidev.dtbo \ + rockchip-ebyte-ecb41-pge-spi0-2cs-spidev.dtbo \ + rockchip-ebyte-ecb41-pge-spi1-1cs-spidev.dtbo \ rockchip-forlinx-ok3506-s12-spi0-1cs-spidev.dtbo \ rockchip-forlinx-ok3506-s12-spi0-2cs-spidev.dtbo \ rockchip-forlinx-ok3506-s12-spi1-1cs-spidev.dtbo \ diff --git a/arch/arm/boot/dts/overlay/README.rockchip-overlays b/arch/arm/boot/dts/overlay/README.rockchip-overlays index 67ebcdd491474..2e1fd677d4a51 100644 --- a/arch/arm/boot/dts/overlay/README.rockchip-overlays +++ b/arch/arm/boot/dts/overlay/README.rockchip-overlays @@ -13,6 +13,11 @@ for RK3506: - disable-ethernet0 - disable-ethernet1 +for Ebyte ECB41-PGE: +- spi0-1cs-spidev +- spi0-2cs-spidev +- spi1-1cs-spidev + for Forlinx OK3506-S12: - spi0-1cs-spidev - spi0-2cs-spidev @@ -41,6 +46,18 @@ Disables `end0` ethernet adapter (`gmac0`, `mdio0`) to save power. ### rk3506-disable-ethernet1 Disables `end1` ethernet adapter (`gmac1`, `mdio1`) to save power. +### ebyte-ecb41-pge-spi0-1cs-spidev +Enables SPI0 spidev on ebyte-ecb41-pge with one chipselect. +Compatible with Raspberry Pi 'spi0-1cs' hats. + +### ebyte-ecb41-pge-spi0-2cs-spidev +Enables SPI0 spidev on ebyte-ecb41-pge with two chipselects. +Compatible with Raspberry Pi 'spi0-2cs' hats. + +### ebyte-ecb41-pge-spi1-1cs-spidev +Enables SPI1 spidev on ebyte-ecb41-pge with one chipselect. +Compatible with Raspberry Pi 'spi1-1cs' hats. + ### forlinx-ok3506-s12-spi0-1cs-spidev Enables SPI0 spidev on forlinx-ok3506-s12 with one chipselect. Compatible with Raspberry Pi 'spi0-1cs' hats. diff --git a/arch/arm/boot/dts/overlay/rockchip-ebyte-ecb41-pge-spi0-1cs-spidev.dts b/arch/arm/boot/dts/overlay/rockchip-ebyte-ecb41-pge-spi0-1cs-spidev.dts new file mode 100644 index 0000000000000..159656570793b --- /dev/null +++ b/arch/arm/boot/dts/overlay/rockchip-ebyte-ecb41-pge-spi0-1cs-spidev.dts @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Enable spidev on SPI0 with RM_IO pinmux at RPi SPI0 physical positions: + * MOSI = RM_IO9 (pin 19), MISO = RM_IO10 (pin 21), + * CLK = RM_IO8 (pin 23), CS0 = RM_IO14 (pin 24) + * Compatible with Raspberry Pi 'spi0-1cs' hats + */ + +/dts-v1/; +/plugin/; + +/ { + metadata { + title = "Enable SPI0 spidev on ebyte-ecb41-pge"; + compatible = "ebyte,ecb41-pge"; + category = "spi"; + exclusive = "spi0", "RM_IO8", "RM_IO9", "RM_IO10", "RM_IO14"; + description = "Enable SPI0 spidev using RM_IO9(MOSI), RM_IO10(MISO), RM_IO8(CLK), RM_IO14(CS0)."; + }; +}; + +&spi0 { + status = "okay"; + num-cs = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&rm_io8_spi0_clk &rm_io10_spi0_miso &rm_io9_spi0_mosi &rm_io14_spi0_csn0>; + + spi@0 { + compatible = "rockchip,spidev"; + reg = <0>; + spi-max-frequency = <50000000>; + status = "okay"; + }; +}; diff --git a/arch/arm/boot/dts/overlay/rockchip-ebyte-ecb41-pge-spi0-2cs-spidev.dts b/arch/arm/boot/dts/overlay/rockchip-ebyte-ecb41-pge-spi0-2cs-spidev.dts new file mode 100644 index 0000000000000..8ccbc6b31bce2 --- /dev/null +++ b/arch/arm/boot/dts/overlay/rockchip-ebyte-ecb41-pge-spi0-2cs-spidev.dts @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Enable spidev on SPI0 with RM_IO pinmux at RPi SPI0 physical positions: + * MOSI = RM_IO9 (pin 19), MISO = RM_IO10 (pin 21), + * CLK = RM_IO8 (pin 23), CS0 = RM_IO14 (pin 24), CS1 = RM_IO7 (pin 26) + * Compatible with Raspberry Pi 'spi0-2cs' hats + */ + +/dts-v1/; +/plugin/; + +/ { + metadata { + title = "Enable SPI0 spidev on ebyte-ecb41-pge with two chipselects"; + compatible = "ebyte,ecb41-pge"; + category = "spi"; + exclusive = "spi0", "RM_IO7", "RM_IO8", "RM_IO9", "RM_IO10", "RM_IO14"; + description = "Enable SPI0 spidev using RM_IO9(MOSI), RM_IO10(MISO), RM_IO8(CLK), RM_IO14(CS0), RM_IO7(CS1)."; + }; +}; + +&spi0 { + status = "okay"; + num-cs = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&rm_io8_spi0_clk &rm_io10_spi0_miso &rm_io9_spi0_mosi &rm_io14_spi0_csn0 &rm_io7_spi0_csn1>; + + spi@0 { + compatible = "rockchip,spidev"; + reg = <0>; + spi-max-frequency = <50000000>; + status = "okay"; + }; + + spi@1 { + compatible = "rockchip,spidev"; + reg = <1>; + spi-max-frequency = <50000000>; + status = "okay"; + }; +}; diff --git a/arch/arm/boot/dts/overlay/rockchip-ebyte-ecb41-pge-spi1-1cs-spidev.dts b/arch/arm/boot/dts/overlay/rockchip-ebyte-ecb41-pge-spi1-1cs-spidev.dts new file mode 100644 index 0000000000000..c7c84204976a9 --- /dev/null +++ b/arch/arm/boot/dts/overlay/rockchip-ebyte-ecb41-pge-spi1-1cs-spidev.dts @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Enable spidev on SPI1 with RM_IO pinmux at RPi SPI1 physical positions: + * MOSI = RM_IO0 (pin 38), MISO = RM_IO11 (pin 35), + * CLK = RM_IO1 (pin 40), CS0 = RM_IO12 (pin 12) + * Compatible with Raspberry Pi 'spi1-1cs' hats + */ + +/dts-v1/; +/plugin/; + +/ { + metadata { + title = "Enable SPI1 spidev on ebyte-ecb41-pge"; + compatible = "ebyte,ecb41-pge"; + category = "spi"; + exclusive = "spi1", "RM_IO0", "RM_IO1", "RM_IO11", "RM_IO12"; + description = "Enable SPI1 spidev using RM_IO0(MOSI), RM_IO11(MISO), RM_IO1(CLK), RM_IO12(CS0)."; + }; +}; + +&spi1 { + status = "okay"; + num-cs = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&rm_io1_spi1_clk &rm_io11_spi1_miso &rm_io0_spi1_mosi &rm_io12_spi1_csn0>; + + spi@0 { + compatible = "rockchip,spidev"; + reg = <0>; + spi-max-frequency = <50000000>; + status = "okay"; + }; +}; diff --git a/arch/arm/boot/dts/rk3506g-ebyte-ecb41-pge.dts b/arch/arm/boot/dts/rk3506g-ebyte-ecb41-pge.dts index 5c8ed6cd13663..842d8833ae866 100644 --- a/arch/arm/boot/dts/rk3506g-ebyte-ecb41-pge.dts +++ b/arch/arm/boot/dts/rk3506g-ebyte-ecb41-pge.dts @@ -177,7 +177,7 @@ }; &cma { - size = <0x400000>; + size = <0x800000>; }; &cpu0 {